Energy-Efficient Discrete Cosine Transform Architecture Using Reversible Logic for IoT-Enabled Consumer Electronics

초록

As IoT applications proliferate, the demand for energy-efficient data processing becomes increasingly vital, particularly for devices operating under power constraints. This paper introduces a novel Discrete Cosine Transform (DCT) architecture implemented using reversible logic to meet the requirements for effective data compression in IoT systems, such as smart surveillance and wearable health monitors. The proposed 8-point fully parallel DCT leverages a customized datapath based on a standard cell approach, integrating pass transistor logic and a full custom layout in UMC 90 nm CMOS technology. Comprehensive validation through functional simulations and design rule checks demonstrates the architecture's reliability. With a compact core area of 0.806 mm(2), the DCT operates at a low power consumption of just 1.12 mW, achieving a clock frequency of 257 MHz. This low-power design facilitates significant energy savings while maintaining high performance and low complexity, making it well-suited for energy-constrained IoT applications.

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